Read/program non-volatile memory cells using floating gate for storage formed on a planar surface of a semiconductor substrate are well known in the art. See for example, U.S. Pat. Nos. 5,029,130 and 6,426,896. Typically, each of these types of memory cells is formed on the horizontal plane of a semiconductor substrate, and involve the programming of the floating gate by hot electron injection and the erasure of electrons from the floating gate by poly-to-poly Fowler-Nordheim tunneling. The floating gate either stores charges or does not. The charges stored on a floating gate control the conduction of charges in the planar channel of a transistor. As the scale of integration increases with semiconductor processing, it becomes desirable to increase the density of such memory devices.
However, as demand for increased density memory increases, there is a need to increase the density of such cells in a semiconductor substrate.